View RCLAMP0544M_4283914.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

PROTECTION PRODUCTS - RailClamp Description
RailClamps are ultra low capacitance TVS arrays designed to protect high speed data interfaces. This series has been specifically designed to protect sensitive components which are connected to high-speed data and transmission lines from overvoltage caused by ESD (electrostatic discharge), CDE (Cable Discharge Events), and EFT (electrical fast transients). The RClampTM0544M has a typical capacitance of only 0.30pF. This means it can be used on circuits operating in excess of 2GHz without signal attenuation. They may be used to meet the ESD immunity requirements of IEC 61000-4-2, Level 4 (15kV air, 8kV contact discharge). These devices are in a MSOP 10L package and feature a lead-free, matte tin finish. They are compatible with both lead free and SnPb assembly techniques. They are designed for easy PCB layout by allowing the traces to run straight through the device. The combination of small size, low capacitance, and high level of ESD protection makes them a flexible solution for protecting high-speed HDMI and DVI video interfaces.
RailClamp ESD Protection for HDMI Interfaces
PRELIMINARY Features
ESD protection for high-speed data lines to IEC 61000-4-2 (ESD) 18kV (air), 12kV (contact) IEC 61000-4-5 (Lightning) 5A (8/20s) IEC 61000-4-4 (EFT) 40A (5/50ns) Array of surge rated diodes with internal TVS Diode Small package saves board space Protects four I/O lines and one Vcc line Low capacitance: 0.3pF typical (I/O to I/O) Low clamping voltage Low operating voltage: 5.0V Solid-state silicon-avalanche technology
RCLAMP0544M
Mechanical Characteristics
JEDEC MSOP 10L package Molding compound flammability rating: UL 94V-0 Marking : Marking code and date code Packaging : Tape and Reel per EIA 481 Lead Finish: Matte Tin RoHS/WEEE Compliant
Applications
High Definition Multi-Media Interface (HDMI) Digital Visual Interface (DVI) 10/100/1000 Ethernet Monitors and Flat Panel Displays Notebook Computers Set Top Box Projection TV
Circuit Diagram
Schematic & PIN Configuration
Pin 8
Line 1 1 Line 2
Pin 1 Pin 2 Pin 4 Pin 5
NC NC Vcc NC NC
GND Line 3 Line 4
Pin 3
MSOP-10L (Top View)
Revision 01/19/2006 1 www.semtech.com
RCLAMP0544M
PROTECTION PRODUCTS Absolute Maximum Rating
Rating Peak Pulse Power (tp = 8/20s) Peak Pulse Current (tp = 8/20s) ESD per IEC 61000-4-2 (Air) ESD per IEC 61000-4-2 (Contact) Operating Temperature Storage Temperature Symbol Ppk IPP VESD TJ TSTG Value 125 5 18 12 -55 to +125 -55 to +150
PRELIMINARY
Units Watts A kV C C
Electrical Characteristics (T=25oC)
Parameter Reverse Stand-Off Voltage Reverse Breakdown Voltage Reverse Leakage Current Clamping Voltage Clamping Voltage Symbol VRWM VBR IR VC VC Conditions Pin 3 to 8 It = 1mA Pin 3 to 8 VRWM = 5V, T=25C Pin 3 to 8 IPP = 1A, tp = 8/20s Any I/O pin to ground IPP = 5A, tp = 8/20s Any I/O pin to ground VR = 0V, f = 1MHz Between I/O pins VR = 0V, f = 1MHz Any I/O pin to ground 0.30 0.70 6 1 15 20 0.7 0.9 Minimum Typical Maximum 5 Units V V A V V pF pF
Junction Capacitance Junction Capacitance
Cj Cj
2006 Semtech Corp.
2
www.semtech.com
RCLAMP0544M
PROTECTION PRODUCTS Typical Characteristics
Non-Repetitive Peak Pulse Power vs. Pulse Time
10
110 100 90 80 70 60 50 40 30 20 10 0
PRELIMINARY
Power Derating Curve
Peak Pulse Power - PPP (kW)
1
0.1
0.01 0.1 1 10 Pulse Duration - tp (s) 100 1000
% of Rated Power or IPP
0
25
50
75
100
125
150
Ambient Temperature - TA (oC)
Pulse Waveform
110 100 90 80 70 60 50 40 30 20 10 0 0 5 10 15 Time (s) 20 25 30 td = IPP/2
PP
Clamping Voltage vs. Peak Pulse Current
Waveform Parameters: tr = 8s td = 20s
18 16 Clamping Voltage -VC (V) 14 12 10 8 6 4 2 0 0 1 2 3 4 5 6 Peak Pulse Current - IPP (A)
Waveform Parameters: tr = 8s td = 20s
Line to Gnd Line to Line
Percent of I
e-t
Forward Voltage vs. Forward Current
Normalized Capacitance vs. Reverse Voltage
3.5 3 Forward Voltage (V) 2.5
CJ(VR) / CJ(VR=0)
1.5
1
Line to Line
2 1.5 1 0.5 0 0 1 2 3 4 5 6 7 Waveform Parameters: tr = 8s td = 20s
Line to Ground
0.5
f = 1 MHz 0 0 1 2 3 Reverse Voltage - VR (V) 4 5
Peak Pulse Current (A)
2006 Semtech Corp.
3
www.semtech.com
RCLAMP0544M
PROTECTION PRODUCTS Typical Characteristics (Con't)
Insertion Loss S21 - I/O to I/O
CH1 S21 LOG 6 dB / REF 0 dB 1: 0.1044 dB 900 MHz 2: -0.3488 dB 1.8 GHz 3: -0.9874 dB 2.5 GHz 0 dB
1 2 3
PRELIMINARY
Insertion Loss S21 - I/O to GND
CH1 S21 LOG 6 dB / REF 0 dB 1: -0.1873 dB 900 MHz 2: -0.6477 dB 1.8 GHz 3: -1.8073 dB 2.5 GHz 0 dB -6 dB -12 dB -18 dB -24 dB -30 dB
3 1 2
-6 dB -12 dB -18 dB -24 dB -30 dB -36 dB 1 MHz START . 030 MHz 10 MHz 100 MHz 3 1 GHz GHz STOP 3000. 000000 MHz
-36 dB
1 MHz START . 030 MHz
10 MHz
100 MHz
3 1 GHz GHz STOP 3000. 000000 MHz
Analog Cross Talk
CH1 S21 LOG 20 dB / REF 0 dB
START . 030 MHz
. STOP 3000 000000 MHz
2006 Semtech Corp.
4
www.semtech.com
RCLAMP0544M
PROTECTION PRODUCTS Applications Information
Device Connection Options for Protection of Four High-Speed Data Lines The RCLAMP0544M TVS is designed to protect four data lines from transient over-voltages by clamping them to a fixed reference. When the voltage on the protected line exceeds the reference voltage (plus diode VF) the steering diodes are forward biased, conducting the transient current away from the sensitive circuitry. Flow Through Layout The RCLAMP0544M is designed for have ease of PCB layout by allowing the traces to run straight through the device. Figure 1 shows the proper way to design the PCB board trace in order to use the flow through layout for two line pairs. The solid line represents the PCB trace. Note that the PCB traces are used to connect the pin pairs for each line (pin 1 to pin 10, pin 2 to pin 9, pin 4 to pin 7, pin 5 to pin 6). For example, line 1 enters at pin 1 and exits at Pin 10 and the PCB trace connects pin 1 and 10 together. This is true for lines 2, 3, and 4. Ground is connected at pin 3. This pin should be connected directly to a ground plane on the board for best results. The path length is kept as short as possible to minimize parasitic inductance. Circuit Board Layout Recommendations for Suppression of ESD. Good circuit board layout is critical for the suppression of ESD induced transients. The following guidelines are recommended: Place the device near the input terminals or connectors to restrict transient coupling. Minimize the path length between the TVS and the protected line. Minimize all conductive loops including power and ground loops. The ESD transient return path to ground should be kept as short as possible. Never run critical signals near board edges. Use ground planes whenever possible.
PRELIMINARY
Figure 1. Flow through Layout for two Line Pairs
Line 1 Line 2 Gnd Line 3 Line 4 Line 1 Line 2 NC Line 3 Line 4
1
Matte Tin Lead Finish Matte tin has become the industry standard lead-free replacement for SnPb lead finishes. A matte tin finish is composed of 100% tin solder with large grains. Since the solder volume on the leads is small compared to the solder paste volume that is placed on the land pattern of the PCB, the reflow profile will be determined by the requirements of the solder paste. Therefore, these devices are compatible with both lead-free and SnPb assembly techniques. In addition, unlike other lead-free compositions, matte tin does not have any added alloys that can cause degradation of the solder joint.
2006 Semtech Corp.
5
www.semtech.com
RCLAMP0544M
PROTECTION PRODUCTS Applications Information (continued)
ESD Protection With RailClamps RailClamps are optimized for ESD protection using the rail-to-rail topology. Along with good board layout, these devices virtually eliminate the disadvantages of using discrete components to implement this topology. ConPIN Descriptions sider the situation shown in Figure 4 where discrete diodes or diode arrays are configured for rail-to-rail protection on a high speed line. During positive duration ESD events, the top diode will be forward biased when the voltage on the protected line exceeds the reference voltage plus the VF drop of the diode. For negative events, the bottom diode will be biased when the voltage exceeds the VF of the diode. At first approximation, the clamping voltage due to the characteristics of the protection diodes is given by: VC = VCC + VF VC = -VF (for positive duration pulses) (for negative duration pulses)
PRELIMINARY
Figure 4 - "Rail-To-Rail" Pro tection Topology "Rail-T Pro Topology (First Approximation)
However, for fast rise time transient events, the effects of parasitic inductance must also be considered as shown in Figure 5. Therefore, the actual clamping voltage seen by the protected circuit will be: VC = VCC + VF + LP diESD/dt (for positive duration pulses) VC = -VF - LG diESD/dt (for negative duration pulses) ESD current reaches a peak amplitude of 30A in 1ns for a level 4 ESD contact discharge per IEC 61000-4-2. Therefore, the voltage overshoot due to 1nH of series inductance is: V = LP diESD/dt = 1X10-9 (30 / 1X10-9) = 30V Example: Consider a VCC = 5V, a typical VF of 30V (at 30A) for the steering diode and a series trace inductance of 10nH. The clamping voltage seen by the protected IC for a positive 8kV (30A) ESD pulse will be: VC = 5V + 30V + (10nH X 30V/nH) = 335V This does not take into account that the ESD current is directed into the supply rail, potentially damaging any components that are attached to that rail. Also note that it is not uncommon for the VF of discrete diodes to exceed the damage threshold of the protected IC. This is due to the relatively small junction area of typical discrete components. It is also possible that the power
2006 Semtech Corp. 6
Figure 5 - The Effects of Parasitic Inductance When Using Discrete Components to Implement Rail-T Pro Rail-To-Rail Pr o t ection
Rail-T Pro Figure 6 - Rail-To-Rail Protection Using RailClamp TV Arrays RailClam p T V S Arrays dissipation capability of the discrete diode will be exceeded, thus destroying the device. The RailClamp is designed to overcome the inherent disadvantages of using discrete signal diodes for ESD suppression. The RailClamp's integrated TVS diode helps to mitigate the effects of parasitic inductance in the power supply connection. During an ESD event, the current will be directed through the integrated TVS diode to ground. The maximum voltage seen by the protected IC due to this path will be the clamping voltage of the device.
www.semtech.com
RCLAMP0544M
PROTECTION PRODUCTS Applications Information (continued)
The HDMI Compliance Test Specification (CTS) requires sink (receiver) ports maintain a differential impedance of 100 Ohms +/- 15%. The measurement is taken using a Time Domain Reflectometry (TDR) method that utilizes a pulse with a risetime <= 200ps. ESD protection devices have an inherent junction capacitance. Even a small amount of added capacitance on an HDMI port will cause the impedance of the differential pair to drop. As such, some form of compensation to the layout will be required to bring the differential pairs back within the required 100 Ohm +/- 15% range. The higher the added capacitance, the more extreme the modifications will need to be. If the added capacitance is too high, compensation may not even be possible. The RCLAMP0544M presents <1pF capacitance between the pairs while being rated to handle >8kV ESD contact discharges (>15kV air discharge) as outlined in IEC 61000-4-2. As such, it is possible to make minor adjustments to the board layout parameters to compensate for the added capacitance of the RCLAMP0544M. Figure 7 shows how to implement the RCLAMP0544M in an HDMI application (transmitter and receiver). Figure 8 shows impedance test results using a Semtech evaluation board with layout compensation. As shown, the device meets the HDMI CTS impedance requirements.
PRELIMINARY
B
A
C
X-axis Y-axis
A 1.640 99.3
B 1.796 105.3
C 1.953 98.7
(nsec) (Ohm)
Figure 8 - TDR Measurement using Semtech Evaluation Board
1
1
1
1
Figure 7 - HDMI High Speed Signal Protection Application Diagram
2006 Semtech Corp. 7 www.semtech.com
RCLAMP0544M
PROTECTION PRODUCTS Applications Information PRELIMINARY
RCLAMP0544M
Data 2+ Data 2Data 1+ Data 1Data 0+ Data 0Clk+ Clk-
1
To LVDS
1
RCLAMP0544M
NDC7002N or UPA672T
LV Supply Rpu DSCL DSDA Rpu LV Supply
CEC SCL SDA Gnd 5VPower HP Detect
RClamp0504F
Figure 9 - HDMI Protection for High and Low speed signals
2006 Semtech Corp.
8
www.semtech.com
RCLAMP0544M
PROTECTION PRODUCTS
RCLAMP0544M Spice Model & Parameters
PRELIMINARY
Applications Information Spice Model
I/O Line
nH
Figure 9 - RCLAMP0544M Spice Model
Table 1 - RCLAMP0544M Spice Parameters Parameter IS BV VJ RS IBV CJO TT M N EG Unit Amp Volt Volt Ohm Amp Farad sec --eV D1 (LCRD) 4.01E-18 180 0.68 0.38 1E-3 0.7E-12 2.541E-9 0.01 1.1 1.11 D2 (LCRD) 4.01E-18 20 0.67 0.548 1E-3 0.7E-12 2.541E-9 0.01 1.1 1.11 D3 (TVS) 3.39E-15 7.66 0.61 0.637 1E-3 190E-12 2.541E-9 0.23 1.1 1.11
2006 Semtech Corp.
9
www.semtech.com
RCLAMP0544M
PROTECTION PRODUCTS Outline SO-8 Outline Drawing --MSOP 10L
e A N 2X E/2 PIN 1 INDICATOR ccc C 2X N/2 TIPS 12 B E1 E H GAGE PLANE 0.25 (L1) D aaa C SEATING PLANE A2 C A1 bxN bbb C A-B D A DETAIL L c SIDE VIEW SEE DETAIL D
PRELIMINARY
DIM
DIMENSIONS INCHES MILLIMETERS MIN NOM MAX MIN NOM MAX
.043 .000 .006 .030 .037 .007 .011 .003 .009 .114 .118 .122 .114 .118 .122 .193 BSC .020 BSC .016 .024 .032 (.037) 10 0 8 .004 .003 .010 1.10 0.00 0.15 0.75 0.95 0.17 0.27 0.08 0.23 2.90 3.00 3.10 2.90 3.00 3.10 4.90 BSC 0.50 BSC 0.40 0.60 0.80 (.95) 10 0 8 0.10 0.08 0.25
A
01
A A1 A2 b c D E1 E e L L1 N 01 aaa bbb ccc
A
NOTES: 1. CONTROLLING DIMENSIONS ARE IN MILLIMETERS (ANGLES IN DEGREES). 2. DATUMS -A- AND -B- TO BE DETERMINED AT DATUM PLANE -H3. DIMENSIONS "E1" AND "D" DO NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. 4. REFERENCE JEDEC STD MO-187, VARIATION BA.
Land Pattern - MSOP 10L
X
DIM
(C) G Z C G P X Y Z
DIMENSIONS INCHES MILLIMETERS
(.161) .098 .020 .011 .063 .224 (4.10) 2.50 0.50 0.30 1.60 5.70
Y P
NOTES: 1. THIS LAND PATTERN IS FOR REFERENCE PURPOSES ONLY. CONSULT YOUR MANUFACTURING GROUP TO ENSURE YOUR COMPANY'S MANUFACTURING GUIDELINES ARE MET.
2006 Semtech Corp.
10
www.semtech.com
RCLAMP0544M
PROTECTION PRODUCTS Marking Codes PRELIMINARY
544M XXXX
* XXXX = Date Code ** Dot indicates Pin 1
Ordering Information
Part Number RCLAMP0544M.TBT Lead Finish Matte Sn Qty per Reel 500 Reel Size 7 Inch
Note: Lead finish is lead-free matte tin.
RailClamp and RClamp are marks of Semtech Corporation.
Contact Information
Semtech Corporation Protection Products Division 200 Flynn Road, Camarillo, CA 93012 Phone: (805)498-2111 FAX (805)498-3804
2006 Semtech Corp. 11 www.semtech.com

▲Up To Search▲

Price & Availability of RCLAMP0544M

	To Download RCLAMP0544M Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .